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STM32G0B1CBT6
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商品说明
商品参数
Features • Includes ST’s most advanced patented technologies • Core: Arm® 32-bit Cortex®-M0+ CPU, Frequency up to 64 MHz • -40°C to 85°C/105°C/125°C operating temperature • Memory – Up to 512 KB Flash with protected and secure areas, two banks, Read-while-write support – 144 KB SRAM (128 KB with hardware parity) • CRC calculation unit • Reset and power management – Voltage range: 1.7 V to 3.6 V – Independent I/O supply pins (1.65 V to 3.6 V) – Power-on/power-off reset (POR/PDR) – Programmable brownout reset (BOR) – Programmable voltage detector (PVD) – Low-power modes: Sleep, Stop, Standby, Power-off – VBAT for RTC and backup registers • Clock management – 4 to 48 MHz crystal oscillator – 32 kHz crystal oscillator with calibration – Internal 16 MHz RC (±1 %) with PLL option – Internal 48 MHz RC oscillator – Internal 32 kHz RC oscillator (±5 %) • Up to 94 fast I/Os – All I/Os can be mapped to external interrupt vectors – Multiple 5 V tolerant I/Os • 12-channel DMA controller with flexible mapping • 12-bit, 0.4 µs ADC (up to 16 external channels) – Up to 16 bits with hardware oversampling – Conversion range: 0 to 3.6 V • Two 12-bit DACs, low-power sample-and-hold • Three fast, low-power analog comparators with programmable inputs and outputs, rail-to-rail • 15 timers (two 128 MHz timers): 16-bit for advanced motor control, one 32-bit and six 16-bit general purpose timers, two basic 16-bit, two low-power 16-bit, two watchdogs, SysTick timer • Calendar RTC with alarm and periodic wakeup from stop/standby/off • Communication interfaces – Three I2C-bus interfaces supporting Fastmode Plus (1 Mbit/s) with extra current sink, two supporting SMBus/PMBus and wakeup from Stop mode – Six USARTs with master/slave synchronous SPI; three supporting ISO7816 interface, LIN, IrDA capability, auto baud rate detection and wakeup feature – Two low-power UARTs – Three SPIs (32 Mbit/s) with 4- to 16-bit programmable bitframe, two multiplexed with I2S interface; six extra SPIs through USARTs – HDMI CEC interface, wakeup on header • USB 2.0 FS device (crystal-less) and host controller • USB Type-C™ Power Delivery controller • Two FDCAN controllers • Development support: serial wire debug (SWD) • 96-bit unique ID • All packages ECOPACK 2 compliant All the evaluation(0)
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