The world-renowned semiconductor manufacturer ROHM (headquartered in Kyoto, Japan) has developed an on-device learning* AI chip (a SoC equipped with on-device learning AI accelerators). Real-time prediction of failure of electronic devices such as built-in motors and sensors (failure sign detection), ideal for edge computing devices and endpoints in the IoT field*1

Usually, in order for an AI chip to realize its function, it needs to perform "training" to set judgment standards, and "inference" to determine how to deal with it based on the information it has learned. In this case, "training" needs to gather a huge amount of data to form a database and update it at any time. Therefore, the AI chip for training needs to have high computing power, and its power consumption will increase accordingly. Because of this, high-performance, expensive AI chips developed for cloud computing devices are emerging in an endless stream, while low-power, on-device learning AI is suitable for edge computing devices and endpoints (the key to building an IoT society more effectively). Chip development is difficult.

The AI chip developed this time is based on the "device-side learning algorithm" developed by Professor Matsutani of Keio University, Japan, and is an AI accelerator*2 (AI dedicated hardware computing circuit) and ROHM 8-bit high-efficiency CPU for commercial development. TInyMicon MaTIsseCORE™ (hereinafter referred to as "MaTIsse")". By combining 20,000 ultra-small AI accelerators with high-efficiency CPUs, training and inference can be achieved with ultra-low power consumption of only tens of mW (only 1/1000 of the previous AI training chips). With this product, unknown input data and patterns can be converted into "different" values and output at the device terminal without connecting to a cloud server, so real-time fault prediction can be realized in many applications.

In the future, ROHM plans to apply the AI accelerator of this AI chip to IC products to realize fault prediction of motors and sensors. The product is planned to be launched in 2023 and put into mass production in 2024.

Professor Hiroki Matsutani, Department of Information Engineering, Faculty of Science and Technology, Keio University, Japan, said: "With the development of IoT technologies such as 5G communication and digital twin*3, the requirements for cloud computing are getting higher and higher. Data is unrealistic in terms of load, cost and power consumption. The 'device-side learning' we research and the 'device-side learning algorithm' we develop are to improve the data processing efficiency at the edge and create a better IoT society. This time, our school has further improved the device-side learning circuit technology through joint research with ROHM, and is expected to launch products in a cost-effective manner. We expect that in the near future, this prototype AI chip will be successfully embedded in ROHM's In IC products, we will contribute to the realization of a more efficient IoT society."